KFUPM Computer Engineering Introduction Digital Logic Design Hello,
This a Computer Engineering Introduction to Digital Logic Design assignment,
Please show all work with clear handwriting.
Thank you. Section 1: Gate Transformations
A. Draw a diagram that shows an AND gate representation of an OR
gate. (Use only AND gates)
B. Draw a diagram that shows an OR gate representation of an AND
gate. (Use only OR gates)
C. Prove that steps A and B are true
D. Using the equation ((A + B) + B’)(C+D’)(E”) do the following:
i. Draw the circuit diagram representation of the given
equation. (No reduction necessary). This will produce an
OR-AND logic circuit
ii. Convert the OR-AND circuit just produced and convert it to
NOR-NOR logic. HINT: There should only be NOR Gates.
Begin by looking at demorgans theorem. You may need to
go a few steps back before you can move forwards.
iii.
Using any method, show that the circuits are equivalent and
explain why having different ways to represent an equation
may be useful
Section 2: K-Maps
Reduce the following equations using K-Maps:
Hint (A+A’) = 1, A(1) = A
1. b + a + (b’a”)
2. a + (ab’cd)
3. a'(abcd)
4. (ad’ + ae’ + cd’ + ce’ + bc)
Section 3: Mux/Decoder/Ram
A. Design the function F(A,B,C) = A’BC’ + AC’ + AB’C using a 4:1
MUX
B. Design the function F(A,B,C,D) = {m(0,5,6,7,8,9,10,12) using
ONLY 4:1 muxs with nothing other than 1’s and O’s on the inputs
and ABCD on the selectors
C. Explain the basic principle of how a decoder works
D. Explain in detail the similarities and differences between ROM and
PLAs and explain the advantages and disadvantages of each.
Section 4: Flip Flops
A. Describe the 4 Flip Flops covered in class. List pros and cons of
each as well as possible applications for each.
B. Using a clocked T Flip Flop create a frequency divider circuit that
reduces the output frequency by 16. Using a negative edge trigger
demonstrate functionality with a timing diagram. Be sure to show
the outputs of all the flipflops.
C. Design a 4-bit register and explain its functionality.
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